NMKN Studio

Latch

Meet the OR gate.

And its truth table:

A	B	Q
0	0	0
0	1	1
1	0	1
1	1	1

If we use a single OR gate and connect its output pin to one of its input pins, and set the other input pin to 1 so that the output value is now 1, we then won't be able to reset it even if we try to set the pin that is not tied to the output back to 0. The gate will have memorised its state because one of the pins is tied to the output which is now at 1- which makes its input stuck at 1 too. In order to return to value of 0 we'd need to switch the power supply off.

This would be more useful if there was a way to reset this state and set it again as many times as we want. This is where the so called SR Latch comes into play. 'SR' stands for Set/Reset and it does exactly what we want it to do- it can remember the output state and reset it if we need it to do so.

NOR Gate

We'll begin by giving you a brief description of the NOR gate. This is the symbol:

And this is its truth table:

A	B	Q
0	0	1
0	1	0
1	0	0
1	1	0

We'll use the 74HC02 chip to build the circuit, which is a quad NOR gate.

NOR Gate SR Latch: Active High

So this is the circuit we'll attempt to build today:

And this is its truth table:

S	R	Q	Q.	Comments
0	0	1 0	0 1	No Change (retains the present state).
0	1	0	1	Reset
1	0	1	0	Set
1	1	0	0	Invalid (Q is not the opposite of Q.)

We also have a simulation below so that you can follow along:

So this is the active high SR latch. Why is it called active high? It's because it'll react to switches being closed rather than opened (as it'll be the case with the active low SR latch we'll introduce in one of the next sections). In other words, set command is S=1. 

In the simulation above, we have two additional 500 Ohm resistors to limit the current into the circuit and keep the input to the NAND gates at 5V. And just in case 10 Ohm resistors in series with the two LEDs. 

Ok, so let's take this step by step.

1. When both switches are off, the state is undefined. You can see this in the truth table where two different output states are written down for a single input state. In real world this means that either one or the other state will be true, depending on where the electrons get first. So for all intents and purposes it’s randomly either going to be in one state or the other. Now in some simulations, you’ll either get both to be off, both slightly dimmed or you’ll get an error message.

2. Let’s press the set switch (labelled S). We immediately see that the output labelled Q came on. As soon as we pressed that button, the bottom NOR gate’s output is at 0 because NOR gate’s input combination of 1 and 0 will output 0. That output is connected to the input pin of the upper NOR gate. The upper (R) switch is still open, therefore the input to the upper NOR gate on that pin is also 0, and hence the output must be 1, according to the truth table of a single NOR gate.

3. It doesn’t matter now if we release that S switch back on again. Circuit will still remember its previous state until we press the R switch. This happens because one of the inputs to the lower gate is still forced to be 1 by the output of the upper gate, therefore the conditions for NOR’s output to be 1 are never going to be met (both inputs must be 0 for the output to be 1).

4. If we now close the S switch back, and press the R switch, both outputs will be 0. This happens because now, the upper NOR will have one of its outputs at 1, which should turn the output off (drop it to 0) according to the truth table of the NOR gate. This output of the upper gate is connected to the input of the lower gate, but this doesn’t change much since both inputs of that lower gate were 1 in the first place. Now both NOR gates have outputs of 0.

You can get the iCircuit file I used for creating this tutorial below (iCircuit is a free software and will be a great addition to your learning resources).
Next up is the active low version of an SR latch.

Download the iCircuit file:

NAND Gate

Once again, we'll start off by taking a look at the NAND gate symbol and its truth table.

And its truth table:

A	B	Q
0	0	1
0	1	1
1	0	1
1	1	0

We'll be using the 74HC00 quad dual input NAND gate IC. Here's the pinout:

NAND Gate SR Latch: Active Low

This is another version of an SR Latch. This time it cconsists of 2 NAND gates. This is so called Active Low SR Latch because it'll react to switches being turned off rather than turned on. Or in other words set is now S=0. Here's the circuit diagram:

Here's the truth table:

S	R	Q	Q.	Comments
0	0	1	1	Invalid (Q is not the opposite of Q.)
0	1	1	0	Set
1	0	0	1	Reset
1	1	1 0	0 1	No Change (retains the present state).

Here's a simulation for you to follow along:

So similarly now, we have two 500 Ohm resistors in the simulation to limit the current and keep the input to the NAND gates at 5V. And just in case 10 Ohm resistors in series with the two LEDs.
So here's how this works:

1. Starting off with both switches S & R being closed, we run into an undefined state. In the simulation above both diodes are very dimmed, but in real life either or would come on- depending on how fast electrons reach them.

2. If we now toggle the S switch off, we’ll immediately drop the voltage supply to one of the upper NAND’s pins. Since the output of the lower NAND (which is currently 0) is wired to the input of the upper NAND, we get the output 1 from the upper NAND gate (as the truth table predited). Switch R to the lower NAND gate has been closed since the start, so the output of that NAND will be 0 anyway according to the truth table. The upper NAND also feeds its output to the lower NAND’s pin which is now at 1, so both inputs to the lower NAND gate are now 1, which is why the lower NAND gate outputs 0.

3. Even if we close the S switch, nothing happens because the NAND gate’s truth table tells us that if inputs are 1 & 0, the output is still 1.

4. Now if we open the R switch, we’lll reset the circuit and Q. LED will be on, while the Q will be off. This is because by opening the R switch we’re meeting the criteria for having the output go to 1. And since the output of that lower NAND gate is fed into the upper NAND gate’s input pin, both inputs of that upper NAND gate are now 1, which according to the truth table should output 0. That output is also wired to the input of the lower NAND gate but it doesn’t matter since the condition is still for the output to be 1 according to the truth table.

5. Now if we open the S switch so that both of them are open, we’ll have both Q and Q. LEDs switched on. If we look at the circuit diagram it should be obvious why- both NAND gates now have their inputs active in such way that they output 1.

6. And the cycle then repeats- if we close R, the Q LED comes on, and if we close S, the Q. LED comes on.

Download the iCircuit file:

Thanks for reading!

HYPER!locrian